194 lines
6.1 KiB
Python
194 lines
6.1 KiB
Python
# Copyright 2018 Intel, Inc.
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# All Rights Reserved.
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#
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# Licensed under the Apache License, Version 2.0 (the "License"); you may
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# not use this file except in compliance with the License. You may obtain
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# a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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# License for the specific language governing permissions and limitations
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# under the License.
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from sushy.resources import base
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from sushy import utils
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from rsd_lib import base as rsd_lib_base
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from rsd_lib.resources.v2_2.system import processor
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from rsd_lib import utils as rsd_lib_utils
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class OnPackageMemoryField(base.ListField):
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memory_type = base.Field('Type')
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"""Type of memory"""
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capacity_mb = base.Field('CapacityMB', adapter=rsd_lib_utils.num_or_none)
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"""Memory capacity"""
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speed_mhz = base.Field('SpeedMHz', adapter=rsd_lib_utils.num_or_none)
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"""Memory speed"""
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class ReconfigurationSlotsDetailsField(base.ListField):
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slot_id = base.Field('SlotId')
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"""Reconfiguration slot identity"""
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uuid = base.Field('UUID')
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"""Reconfiguration slot uuid"""
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programmable_from_host = base.Field('ProgrammableFromHost', adapter=bool)
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"""Indict whether programmable from host"""
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class FpgaField(base.CompositeField):
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fpga_type = base.Field('Type')
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"""Type of FPGA"""
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model = base.Field('Model')
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"""Model of FPGA"""
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fw_id = base.Field('FwId')
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"""Firmware identity of FPGA"""
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fw_manufacturer = base.Field('FwManufacturer')
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"""Firmware manufacturer of FPGA"""
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fw_version = base.Field('FwVersion')
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"""Firmware version of FPGA"""
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host_interface = base.Field('HostInterface')
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"""Host interface of FPGA"""
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external_interfaces = base.Field('ExternalInterfaces')
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"""External interfaces of FPGA"""
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sideband_interface = base.Field('SidebandInterface')
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"""Sideband interface of FPGA"""
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pcie_virtual_functions = base.Field(
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'PCIeVirtualFunctions', adapter=rsd_lib_utils.num_or_none)
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"""PCIe Virtual functions of FPGA"""
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programmable_from_host = base.Field('ProgrammableFromHost', adapter=bool)
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"""Indict whether programmable from host"""
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reconfiguration_slots = base.Field(
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'ReconfigurationSlots', adapter=rsd_lib_utils.num_or_none)
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"""Number of supported reconfiguration slots"""
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reconfiguration_slots_details = ReconfigurationSlotsDetailsField(
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'ReconfigurationSlotsDetails')
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"""Details of supported reconfiguration slots"""
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# TODO(linyang): might need to return instance instead of URI
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acceleration_functions = base.Field(
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'AccelerationFunctions', adapter=rsd_lib_utils.get_resource_identity)
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"""The reference to a resource of type AccelerationFunctions"""
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class IntelRackScaleField(processor.IntelRackScaleField):
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on_package_memory = OnPackageMemoryField('OnPackageMemory')
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"""An array of references to the endpoints that connect to this processor
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"""
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thermal_design_power_watt = base.Field(
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'ThermalDesignPowerWatt', adapter=rsd_lib_utils.num_or_none)
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"""Thermal Design Power (TDP) of this processor"""
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metrics = base.Field(
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'Metrics', adapter=rsd_lib_utils.get_resource_identity)
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"""A reference to the Metrics associated with this Processor"""
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extended_identification_registers = rsd_lib_base.DynamicField(
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'ExtendedIdentificationRegisters')
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"""Extended contents of the Identification Registers (CPUID) for this
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processor
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"""
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fpga = FpgaField('FPGA')
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"""FPGA specific properties for FPGA ProcessorType"""
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# TODO(linyang): might need to return instance instead of URI
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pcie_function = base.Field(
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'PCIeFunction', adapter=rsd_lib_utils.get_resource_identity)
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"""The reference to a resource of type PCIeFunction"""
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class OemField(base.CompositeField):
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intel_rackscale = IntelRackScaleField('Intel_RackScale')
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"""Intel Rack Scale Design extensions ('Intel_RackScale' object)"""
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class LinksIntelRackScaleField(base.CompositeField):
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connected_port = base.Field(
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'ConnectedPort', adapter=rsd_lib_utils.get_resource_identity)
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"""The reference to a resource of type ConnectedPort"""
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endpoints = base.Field('Endpoints', adapter=utils.get_members_identities)
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"""The reference to a list of type Endpoints"""
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connected_processors = base.Field(
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'ConnectedProcessors', adapter=utils.get_members_identities)
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"""The reference to a list of type ConnectedProcessors"""
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class LinksOemField(base.CompositeField):
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intel_rackscale = LinksIntelRackScaleField('Intel_RackScale')
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"""The Intel Rack Scale specific reference links"""
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class LinksField(base.CompositeField):
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chassis = base.Field(
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'Chassis', adapter=rsd_lib_utils.get_resource_identity)
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"""The reference to a resource of type Chassis that represent the physical
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container associated with this processor
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"""
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oem = LinksOemField('Oem')
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"""The Oem specific reference links"""
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class Processor(processor.Processor):
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links = LinksField('Links')
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"""Contain references to resources that are related to, but not contained
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by (subordinate to), this processor
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"""
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oem = OemField('Oem')
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"""Oem extension object"""
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def _get_sub_processors_path(self):
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"""Helper function to find the System process metrics path"""
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return utils.get_sub_resource_path_by(self, 'SubProcessors')
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@property
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@utils.cache_it
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def sub_processors(self):
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"""Property to provide reference to `ProcessorCollection` instance
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It is calculated once the first time it is queried. On refresh,
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this property is reset.
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"""
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return ProcessorCollection(
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self._conn, self._get_sub_processors_path(),
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redfish_version=self.redfish_version)
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class ProcessorCollection(processor.ProcessorCollection):
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@property
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def _resource_type(self):
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return Processor
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